Sciweavers

5414 search results - page 12 / 1083
» Data representation synthesis
Sort
View
DAC
2003
ACM
16 years 4 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
TVCG
2008
136views more  TVCG 2008»
15 years 3 months ago
Hierarchical Tensor Approximation of Multi-Dimensional Visual Data
Abstract-- Visual data comprise of multi-scale and inhomogeneous signals. In this paper, we exploit these characteristics and develop a compact data representation technique based ...
Qing Wu, Tian Xia, Chun Chen, Hsueh-Yi Sean Lin, H...
107
Voted
ICCD
1994
IEEE
142views Hardware» more  ICCD 1994»
15 years 7 months ago
Grammar-Based Optimization of Synthesis Scenarios
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
Andreas Kuehlmann, Lukas P. P. P. van Ginneken
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
15 years 1 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
ICCTA
2007
IEEE
15 years 7 months ago
Register Sharing Verification During Data-Path Synthesis
The variables of the high-level specifications and the automatically generated temporary variables are mapped on to the data-path registers during data-path synthesis phase of hig...
Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sa...