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DRM
2007
Springer
14 years 1 months ago
Data structures for limited oblivious execution of programs while preserving locality of reference
We introduce a data structure for program execution under a limited oblivious execution model. For fully oblivious execution along the lines of Goldreich and Ostrovsky [2], one tr...
Avinash V. Varadarajan, Ramarathnam Venkatesan, C....
ICS
2010
Tsinghua U.
14 years 7 days ago
Cache oblivious parallelograms in iterative stencil computations
We present a new cache oblivious scheme for iterative stencil computations that performs beyond system bandwidth limitations as though gigabytes of data could reside in an enormou...
Robert Strzodka, Mohammed Shaheen, Dawid Pajak, Ha...
MICRO
1997
IEEE
79views Hardware» more  MICRO 1997»
13 years 11 months ago
On High-Bandwidth Data Cache Design for Multi-Issue Processors
Highly aggressive multi-issue processor designs of the past few years and projections for the next decade require that we redesign the operation of the cache memory system. The nu...
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson,...
SOFTVIS
2010
ACM
13 years 7 months ago
Towards anomaly comprehension: using structural compression to navigate profiling call-trees
Developers must often diagnose anomalies in programs they only have a partial knowledge of. As a result, they must simultaneously reverse engineer parts of the system they are unf...
Shen Lin 0003, François Taïani, Thomas...
IPPS
1998
IEEE
13 years 11 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man