1602 search results - page 303 / 321 » Database Architectures for New Hardware |
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
ASAP
2007
IEEE
13 years 10 months ago
2007
IEEE
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
CACM
2010
13 years 8 months ago
2010
Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating syste...
BMCBI
2010
13 years 8 months ago
2010
Background: Massively parallel sequencing readouts of epigenomic assays are enabling integrative genome-wide analyses of genomic and epigenomic variation. Pash 3.0 performs sequen...
MMB
2012
Springer
12 years 4 months ago
2012
Springer
Abstract. During development, processor architectures can be tuned and configured by many different parameters. For benchmarking, automatic design space explorations (DSEs) with h...