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HPCA
2011
IEEE
13 years 2 months ago
Checked Load: Architectural support for JavaScript type-checking on mobile processors
Dynamic languages such as Javascript are the de-facto standard for web applications. However, generating efficient code for dynamically-typed languages is a challenge, because it...
Owen Anderson, Emily Fortuna, Luis Ceze, Susan Egg...
ICCD
2001
IEEE
120views Hardware» more  ICCD 2001»
14 years 8 months ago
Architectural Enhancements for Fast Subword Permutations with Repetitions in Cryptographic Applications
We propose two new instructions, swperm and sieve, that can be used to efficiently complete an arbitrary bit-level permutation of an n-bit word with or without repetitions. Permut...
John Patrick McGregor, Ruby B. Lee
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
14 years 5 months ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
CLUSTER
2003
IEEE
14 years 4 months ago
Implications of a PIM Architectural Model for MPI
Memory may be the only system component that is more commoditized than a microprocessor. To simultaneously exploit this and address the impending memory wall, processing in memory...
Arun Rodrigues, Richard C. Murphy, Peter M. Kogge,...
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
14 years 3 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus