145 search results - page 7 / 29 » Datapath Scheduling using Dynamic Frequency Clocking |
CDC
2009
IEEE
14 years 3 months ago
2009
IEEE
— We study a clock calibration problem for an ultra-low power timer on a sensor node platform. When the sensor is put into sleep mode, this timer is the only thing left running, ...
ISCAS
2011
IEEE
2011
IEEE
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
13 years 2 months ago
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
CLUSTER
2007
IEEE
14 years 5 months ago
2007
IEEE
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...
DATE
2009
IEEE
14 years 5 months ago
2009
IEEE
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
ISLPED
1996
ACM
14 years 3 months ago
1996
ACM
We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling pro...