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133
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
109
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Reducing the code size of embedded applications is one of the important constraint in embedded system design. Code compression can provide substantial savings in terms of size. In...
129
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
147
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
134
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
– A new approach for diagnostic analysis of static errors in multi-step ADC based on the steepestdescent method is proposed. To set initial data, estimate the parameter update an...