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117
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DATE
2006
IEEE
91views Hardware» more  DATE 2006»
15 years 10 months ago
How OEMs and suppliers can face the network integration challenges
Systems integration is a major challenge in many industries. Systematic analysis of the complex integration effects, especially with respect to timing and performance, significant...
Kai Richter, Rolf Ernst
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 10 months ago
Optimizing sequential cycles through Shannon decomposition and retiming
—Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pip...
Cristian Soviani, Olivier Tardieu, Stephen A. Edwa...
DATE
2006
IEEE
98views Hardware» more  DATE 2006»
15 years 10 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
122
Voted
DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 10 months ago
On the verification of automotive protocols
Verification quality is a must for functional safety in electronic systems. In automotive, the verification flow is historically based on a layered approach, where each level (mod...
G. Zarri, F. Colucci, F. Dupuis, R. Mariani, M. Pa...
DATE
2006
IEEE
112views Hardware» more  DATE 2006»
15 years 10 months ago
Simultaneously improving code size, performance, and energy in embedded processors
Code size and energy consumption are critical design concerns for embedded processors as they determine the cost of the overall system. Techniques such as reduced length instructi...
Ahmad Zmily, Christos Kozyrakis