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DATE
2005
IEEE
164views Hardware» more  DATE 2005»
15 years 9 months ago
Automated Synthesis of Assertion Monitors using Visual Specifications
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
Ambar A. Gadkari, S. Ramesh
DATE
2005
IEEE
112views Hardware» more  DATE 2005»
15 years 9 months ago
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques
In this paper we present arithmetic real-coded variation operators tailored for time slot and turn optimization on TDMA-scheduled resources with evolutionary algorithms. Our opera...
Arne Hamann, Rolf Ernst
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
15 years 9 months ago
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jun...
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
15 years 9 months ago
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction
Assessing IC manufacturing process fluctuations and their impacts on IC interconnect performance has become unavoidable for modern DSM designs. However, the construction of parame...
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, S...
DATE
2005
IEEE
176views Hardware» more  DATE 2005»
15 years 9 months ago
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), ...
Vasco M. Manquinho, João P. Marques Silva