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DATE
2010
IEEE
166views Hardware» more  DATE 2010»
15 years 9 months ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali
DATE
2010
IEEE
188views Hardware» more  DATE 2010»
15 years 9 months ago
Power-accuracy tradeoffs in human activity transition detection
— Wearable, mobile computing platforms are envisioned to be used in out-patient monitoring and care. These systems continuously perform signal filtering, transformations, and cla...
Jeffrey Boyd, Hari Sundaram, Aviral Shrivastava
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
15 years 9 months ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
15 years 9 months ago
Memory System Connectivity Exploration
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
15 years 9 months ago
Reconfigurable SoC - What Will it Look Like?
The argument against ASIC SoCs is that they have always taken too long and cost too much to design. As new process technologies come on line, the issue of inflexible, unyielding d...
J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chri...