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2000
IEEE
114views Hardware» more  DATE 2000»
15 years 10 months ago
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths
Designs which do not fully utilize their arithmetic datapath components typically exhibit a significant overhead in power consumption. Whenever a module performs an operation who...
Michael Münch, Norbert Wehn, Bernd Wurth, Ren...
DATE
2000
IEEE
124views Hardware» more  DATE 2000»
15 years 10 months ago
On the Generation of Multiplexer Circuits for Pass Transistor Logic
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
Christoph Scholl, Bernd Becker
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
15 years 10 months ago
A 50 Mbit/s Iterative Turbo-Decoder
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
F. Viglione, Guido Masera, Gianluca Piccinini, Mas...
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DATE
1999
IEEE
134views Hardware» more  DATE 1999»
15 years 10 months ago
Verifying Imprecisely Working Arithmetic Circuits
If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between th...
Michaela Huhn, Klaus Schneider, Thomas Kropf, Geor...
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
15 years 10 months ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
Luís Guerra e Silva, Luis Miguel Silveira, ...