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DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 2 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
DATE
2003
IEEE
75views Hardware» more  DATE 2003»
14 years 2 months ago
Circuit and Platform Design Challenges in Technologies beyond 90nm
There are already a huge number of problems for silicon designers and it is likely to just get worse. Many of these problems are technical associated with shrinking geometries and...
Bill Grundmann, Rajesh Galivanche, Sandip Kundu
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
14 years 3 months ago
A methodology for improving software design lifecycle in embedded control systems
Control design and real-time implementation are usually performed in isolation. The effects of the computer implementation on control system performance are still evaluated on the...
Mohamed El Mongi Ben Gaid, Rémy Kocik, Yves...
DATE
2008
IEEE
120views Hardware» more  DATE 2008»
14 years 3 months ago
A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder
Chip reliability becomes a great threat to the design of future microelectronic systems with the continuation of the progressive downscaling of CMOS technologies. Hence increasing...
Matthias May, Matthias Alles, Norbert Wehn
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 3 months ago
Sizing Rules for Bipolar Analog Circuit Design
This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level o...
Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann