457 search results - page 76 / 92 » Decay-Usage Scheduling in Multiprocessors |
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
We present Lazy Binary Splitting (LBS), a user-level scheduler of nested parallelism for shared-memory multiprocessors that builds on existing Eager Binary Splitting work-stealing...
SPAA
2003
ACM
14 years 22 days ago
2003
ACM
In this paper we consider the following scenario. A set of n jobs with different threads is being run concurrently. Each job has an associated weight, which gives the proportion ...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...