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» Decomposing replicable functions
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ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
14 years 25 days ago
Instruction set and functional unit synthesis for SIMD processor cores
—This paper focuses on SIMD processor synthesis and proposes a SIMD instruction set/functional unit synthesis algorithm. Given an initial assembly code and a timing constraint, t...
Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka,...
ICCD
1996
IEEE
170views Hardware» more  ICCD 1996»
13 years 11 months ago
Boolean Function Representation Based on Disjoint-Support Decompositions
The Multi-Level Decomposition Diagrams (MLDDs) of this paper are a canonical representation of Boolean functions expliciting disjoint-support decompositions. MLDDs allow the reduc...
Valeria Bertacco, Maurizio Damiani
JFP
2006
91views more  JFP 2006»
13 years 7 months ago
A reflective functional language for hardware design and theorem proving
This paper introduces reFLect, a functional programming language with reflection features intended for applications in hardware design and verification. The reFLect language is st...
Jim Grundy, Thomas F. Melham, John W. O'Leary
ML
2002
ACM
100views Machine Learning» more  ML 2002»
13 years 7 months ago
Structure in the Space of Value Functions
Solving in an efficient manner many different optimal control tasks within the same underlying environment requires decomposing the environment into its computationally elemental ...
David J. Foster, Peter Dayan
ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orail...