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TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 4 months ago
A novel framework for faster-than-at-speed delay test considering IR-drop effects
Faster-than-at-speed test have been proposed to detect small delay defects. While these techniques increase the test frequency to reduce the positive slack of the path, they exace...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ATS
2010
IEEE
229views Hardware» more  ATS 2010»
13 years 5 months ago
Variation-Aware Fault Modeling
Abstract--To achieve a high product quality for nano-scale systems both realistic defect mechanisms and process variations must be taken into account. While existing approaches for...
Fabian Hopsch, Bernd Becker, Sybille Hellebrand, I...
MTDT
2003
IEEE
164views Hardware» more  MTDT 2003»
14 years 20 days ago
Applying Defect-Based Test to Embedded Memories in a COT Model
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
Robert C. Aitken
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
13 years 11 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee