55 search results - page 1 / 11 » Definitions of Equivalence for Transformational Synthesis of... |
ICECCS
2000
IEEE
14 years 20 hour ago
2000
IEEE
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
CORR
2006
Springer
13 years 7 months ago
2006
Springer
Currently many different modeling languages are used for workflow definitions in BPM systems. Authors of this paper analyze the two most popular graphical languages, with highest p...
FDL
2007
IEEE
14 years 1 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
FSEN
2009
Springer
13 years 11 months ago
2009
Springer
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...