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» Degree Bounded Network Design with Metric Costs
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AINA
2007
IEEE
14 years 2 months ago
Synthetic Trace-Driven Simulation of Cache Memory
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
WMASH
2003
ACM
14 years 1 months ago
An end-to-end multi-path smooth handoff scheme for stream media
In the near future, wide variety of wireless networks will be merged into the Internet and allow users to continue their application with higher degree of mobility. In such enviro...
Yi Pan, Meejeong Lee, Jaime Bae Kim, Tatsuya Suda
ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
14 years 5 months ago
A revisit to floorplan optimization by Lagrangian relaxation
With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this paper we clarify a misunderstanding in using Lag...
Chuan Lin, Hai Zhou, Chris C. N. Chu
SIGCOMM
2006
ACM
14 years 2 months ago
Minimizing churn in distributed systems
A pervasive requirement of distributed systems is to deal with churn — change in the set of participating nodes due to joins, graceful leaves, and failures. A high churn rate ca...
Brighten Godfrey, Scott Shenker, Ion Stoica
ISVLSI
2008
IEEE
142views VLSI» more  ISVLSI 2008»
14 years 3 months ago
A Fuzzy Approach for Variation Aware Buffer Insertion and Driver Sizing
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
Venkataraman Mahalingam, Nagarajan Ranganathan