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» Delay modelling improvement for low voltage applications
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IPPS
2007
IEEE
14 years 2 months ago
Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling
While improving raw performance is of primary interest to most users of high-performance computers, energy consumption also is a critical concern. Some microprocessors allow volta...
Min Yeol Lim, Vincent W. Freeh
ICPPW
2007
IEEE
14 years 2 months ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu
RSA
2000
170views more  RSA 2000»
13 years 7 months ago
Delayed path coupling and generating random permutations
We analyze various stochastic processes for generating permutations almost uniformly at random in distributed and parallel systems. All our protocols are simple, elegant and are b...
Artur Czumaj, Miroslaw Kutylowski
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 1 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
14 years 29 days ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang