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» Delay modelling improvement for low voltage applications
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PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
HPCA
2012
IEEE
12 years 3 months ago
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chi
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser ...
MOBIQUITOUS
2005
IEEE
14 years 1 months ago
Content-Based Routing in Mobile Ad Hoc Networks
The publish/subscribe model of communication provides sender/receiver decoupling and selective information dissemination that is appropriate for mobile environments characterized ...
Milenko Petrovic, Vinod Muthusamy, Hans-Arno Jacob...
ISPD
1999
ACM
95views Hardware» more  ISPD 1999»
14 years 6 days ago
Incremental capacitance extraction and its application to iterative timing-driven detailed routing
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Yanhong Yuan, Prithviraj Banerjee
INFOCOM
2007
IEEE
14 years 2 months ago
An Accurate Link Model and Its Application to Stability Analysis of FAST TCP
— This paper presents a link model which captures the queue dynamics when congestion windows of TCP sources change. By considering both the self-clocking and the link integrator ...
Ao Tang, Krister Jacobsson, Lachlan L. H. Andrew, ...