38 search results - page 3 / 8 » Delay-Insensitive Ternary Logic |
AC
2002
Springer
13 years 6 months ago
2002
Springer
Abstract. Delay-Insensitive Sequential Processes is a structured, parallel programming language. It facilitates the clear, succinct and precise specification of the way an asynchro...
ISQED
2009
IEEE
14 years 1 months ago
2009
IEEE
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
APCCAS
2006
IEEE
14 years 23 days ago
2006
IEEE
— We present a design technique for implementing asynchronous ALUs with CMOS domino logic and delay insensitive dual rail four-phase logic. It ensures economy in silicon area and...
JOLLI
2008
13 years 6 months ago
2008
In this paper, consistency is understood in the standard way, i.e. as the absence of a contradiction. The basic constructive logic BK c4 , which is adequate to this sense of consis...
JDM
2000
13 years 6 months ago
2000
Little work has been completed which addresses the logical composition and use of ternary relationships in entity-relationship modeling. Many modeling notations and most CASE tool...