This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
FinFET technology has been proposed as a promising alternative for deep sub-micro bulk CMOS technology, because of its better scalability. Previous work have studied the performan...
Feng Wang 0004, Yuan Xie, Kerry Bernstein, Yan Luo
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
This paper addresses the problem of scheduling parallel tasks, represented by a direct acyclic graph (DAG) on heterogeneous clusters. Parallel tasks, also called malleable tasks, ...
Jorge G. Barbosa, C. N. Morais, R. Nobrega, A. P. ...
The guaranty of meeting the timing constraints during the design phase of real-time component-based embedded software has not been realized. To satisfy real-time requirements, we ...
Egor Bondarev, Peter H. N. de With, Michel R. V. C...