Multi-frame rate rendering is a parallel rendering technique that renders interactive parts of the scene on one graphics card while the rest of the scene is rendered asynchronousl...
Jan P. Springer, Christopher Lux, Dirk Reiners, Be...
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Abstract. In this project we present a framework for a multi-touch surface using multiple cameras. With an overhead camera and side-mounted camera we determine the three dimensiona...
Background: TATA box is one of the most important transcription factor binding sites. But the exact sequences of TATA box are still not very clear. Results: In this study, we cond...
A large body of research literature has focused on improving the performance of longest prefix match IP-lookup. More recently, embedded memory based architectures have been propos...
Sailesh Kumar, Michela Becchi, Patrick Crowley, Jo...