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HIPEAC
2009
Springer
14 years 1 months ago
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
Mohammad Ansari, Mikel Luján, Christos Kots...
PADL
2001
Springer
14 years 1 months ago
Specifying Authentication Protocols Using Rewriting and Strategies
Abstract. Programming with rewrite rules and strategies has been already used for describing several computational logics. This paper describes the way the Needham-Schroeder Public...
Horatiu Cirstea
UML
2001
Springer
14 years 1 months ago
UML Modelling and Performance Analysis of Mobile Software Architectures
Modern distributed software applications generally operate in complex and heterogeneous computing environments (like the World Wide Web). Different paradigms (client-server, mobili...
Vincenzo Grassi, Raffaela Mirandola
WEBENG
2001
Springer
14 years 1 months ago
Web Engineering Resources
This paper introduces the Web Engineering Resources Portal (shortly WEP), as a basic Reference Model and Guide for the Web Engineers. WEP provides a general classification of Web E...
DATE
2000
IEEE
88views Hardware» more  DATE 2000»
14 years 1 months ago
Techniques for Reducing Read Latency of Core Bus Wrappers
Today’s system-on-a-chip designs consist of many cores. To enable cores to be easily integrated into different systems, many propose creating cores with their internal logic sep...
Roman L. Lysecky, Frank Vahid, Tony Givargis
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