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TVLSI
2008
121views more  TVLSI 2008»
13 years 7 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
FAC
2006
122views more  FAC 2006»
13 years 7 months ago
The verified software repository: a step towards the verifying compiler
The Verified Software Repository is dedicated to a long-term vision of a future in which all computer systems justify the trust that Society increasingly places in them. This will ...
Juan Bicarregui, C. A. R. Hoare, J. C. P. Woodcock
PEPM
1997
ACM
13 years 12 months ago
Annotation-Directed Run-Time Specialization in C
We present the design of a dynamic compilation system for C. Directed by a few declarative user annotations specifying where and on what dynamic compilation is to take place, a bi...
Brian Grant, Markus Mock, Matthai Philipose, Craig...
POPL
1996
ACM
13 years 12 months ago
A Practical and Flexible Flow Analysis for Higher-Order Languages
operators. The analysis is abstract interpretation-based and is parameterized over two polyvariance operators and a projection operator. These operators are used to regulate the sp...
J. Michael Ashley
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 4 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He