System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
The design and development of an Interactive Evolutionary Computation (IEC) system needs to take into account the implementation issues found when delivering the system to “Real...
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
This paper is about the modular compilation and distribution of a sub-class of Simulink programs [9] across networks using bounded FIFO queues. The problem is first addressed mat...
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...