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GECCO
2007
Springer
179views Optimization» more  GECCO 2007»
14 years 2 months ago
A destructive evolutionary process: a pilot implementation
This paper describes the application of evolutionary search to the problem of Flash memory wear-out. The operating parameters of Flash memory are notoriously difficult to determin...
Joe Sullivan, Conor Ryan
IEEEPACT
2007
IEEE
14 years 2 months ago
A Loop Correlation Technique to Improve Performance Auditing
Performance auditing is an online optimization strategy that empirically measures the effectiveness of an optimization on a particular code region. It has the potential to greatly...
Jeremy Lau, Matthew Arnold, Michael Hind, Brad Cal...
POPL
2010
ACM
14 years 5 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
CHES
2009
Springer
230views Cryptology» more  CHES 2009»
14 years 8 months ago
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves
Abstract. This paper presents a design-space exploration of an applicationspecific instruction-set processor (ASIP) for the computation of various cryptographic pairings over Barre...
David Kammler, Diandian Zhang, Dominik Auras, Gerd...
ISQED
2010
IEEE
114views Hardware» more  ISQED 2010»
14 years 2 months ago
Toward effective utilization of timing exceptions in design optimization
— Timing exceptions in IC implementation processes, especially timing verification, help reduce pessimism that arises from unnecessary timing constraints by masking non-function...
Kwangok Jeong, Andrew B. Kahng, Seokhyeong Kang