Toward effective utilization of timing exceptions in design optimization

— Timing exceptions in IC implementation processes, especially timing verification, help reduce pessimism that arises from unnecessary timing constraints by masking non-functional critical paths. Ideally, timing exceptions should always be helpful for quality of results (QOR) metrics such as area or number of timing violations, and for design turnaround time (TAT) metrics such as tool runtime and number of design iterations. We expect this positive impact since timing exceptions reduce the number of constraints that the design optimization must satisfy. In this work, we evaluate the impact of timing exceptions on design QOR and TAT, with respect to (1) the forms in which timing exception are declared, (2) the timing criticality of the target paths, (3) the number of applicable exceptions, and (4) the design stages at which timing exceptions are extracted and applied. From our experimental analyses, we observe that applying more exceptions in commercial tool flows does not consisten...

• Type: Conference
• Year: 2010
• Where: ISQED
• Authors: Kwangok Jeong, Andrew B. Kahng, Seokhyeong Kang
• Keywords: Hardware, Ineffective Timing Exceptions, ISQED 2010, Timing Exceptions, Unnecessary Timing Constraints