1422 search results - page 26 / 285 » Design, Implementation and Performance Evaluation of IP-VPN |
FPL
2010
Springer
13 years 6 months ago
2010
Springer
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
ICRA
2009
IEEE
14 years 3 months ago
2009
IEEE
— We report on a 9-axis inertial measurement unit (IMU) which utilizes 3-axis angular velocity measurements from rate gyros and 6-axis linear acceleration measurements from three...
ASPLOS
2000
ACM
14 years 26 days ago
2000
ACM
We systematically evaluate the performance of five implementations of a single, user-level communication interface. Each implementation makes different architectural assumptions ...
TLDI
2010
ACM
14 years 5 months ago
2010
ACM
We present the design of a formal low-level multi-threaded language with advanced region-based memory management and synchronization primitives, where well-typed programs are memo...
PPOPP
2009
ACM
14 years 3 months ago
2009
ACM
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...