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IJCNN
2000
IEEE
15 years 10 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
FPL
2006
Springer
124views Hardware» more  FPL 2006»
15 years 9 months ago
A Dynamically Reconfigurable Queue Scheduler
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
Christoforos Kachris, Stamatis Vassiliadis
DAS
2008
Springer
15 years 7 months ago
Document Image Retrieval to Support Reading Mokkans
This paper presents a design and an implementation of document image retrieval to support reading mokkans. A mokkan is a wooden tablet with text written by a brush in India ink. D...
Akihito Kitadai, Jun Takakura, Masatoshi Ishikawa,...
IJBC
2006
93views more  IJBC 2006»
15 years 6 months ago
Some Basic Cryptographic Requirements for Chaos-Based Cryptosystems
In recent years, a large amount of work on chaos-based cryptosystems have been published. However many of the proposed schemes fail to explain or do not possess a number of featur...
Gonzalo Álvarez, Shujun Li
MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
15 years 5 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas