135 search results - page 13 / 27 » Design, layout and verification of an FPGA using automated t... |
SIGADA
2005
Springer
14 years 1 months ago
2005
Springer
This paper describes experiences garnered while teaching a course on high integrity software using SPARK to a mix of junior and senior level undergraduates. The paper describes th...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
For present-day micro-electronic designs, it is becoming ever more important to accurately model substrate coupling effects. Basically, either a Finite Element Method (FEM) or a B...
APSEC
2004
IEEE
13 years 11 months ago
2004
IEEE
To formalize a software process, its important aspects must be extracted as a model. Many processes are used repeatedly, and the ability to automate a process is also desired. One...
CORR
2007
Springer
13 years 7 months ago
2007
Springer
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
ACSC
2004
IEEE
13 years 11 months ago
2004
IEEE
An approach to system verification is described in which design artefacts produced during forward engineering are automatically compared to corresponding artefacts produced during...