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MTV
2007
IEEE
121views Hardware» more  MTV 2007»
15 years 10 months ago
Chico: An On-chip Hardware Checker for Pipeline Control Logic
The widening gap between CPU complexity and verification capability is becoming increasingly more salient. It is impossible to completely verify the functionality of a modern mic...
Andrew DeOrio, Adam Bauserman, Valeria Bertacco
ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
15 years 9 months ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu
CODES
1999
IEEE
15 years 8 months ago
Using codesign techniques to support analog functionality
With the growth of System on a Chip (SoC), the functionality of analog components must also be considered in the design process. This paper describes some of the design implementa...
Francis G. Wolff, Michael J. Knieser, Daniel J. We...
ENTCS
2002
107views more  ENTCS 2002»
15 years 3 months ago
Monitoring, Checking, and Steering of Real-Time Systems
The MaC system has been developed to provide assurance that a target program is running correctly with respect to formal requirements specification. This is achieved by monitoring...
Moonjoo Kim, Insup Lee, Usa Sammapun, Jangwoo Shin...
ICSE
2003
IEEE-ACM
16 years 4 months ago
Cadena: An Integrated Development, Analysis, and Verification Environment for Component-based Systems
The use of component models such as Enterprise Java Beans and the CORBA Component Model (CCM) in application development is expanding rapidly. Even in real-time safety/mission-cri...
John Hatcliff, Xianghua Deng, Matthew B. Dwyer, Ge...