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EUROMICRO
1996
IEEE
13 years 11 months ago
A Graph Rewriting Approach for Transformational Design of Digital Systems
Transformational design integrates design and verification. It combines "correctness by construciion" and design creativity by the use ofpre-proven behaviour preserving ...
Corrie Huijs
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
14 years 1 months ago
Synthesizing Synchronous Elastic Flow Networks
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
Greg Hoover, Forrest Brewer
EH
2003
IEEE
117views Hardware» more  EH 2003»
14 years 3 days ago
The Evolutionary Design and Synthesis of Non-Linear Digital VLSI Systems
This paper describes a multi-objective Evolutionary Algorithm (EA) system for the synthesis of efficient non-linear VLSI circuit modules. The EA takes the specification for a no...
Robert Thomson, Tughrul Arslan
DAC
1990
ACM
13 years 11 months ago
Timing Verification Using HDTV
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
Alan R. Martello, Steven P. Levitan, Donald M. Chi...
VTS
1999
IEEE
81views Hardware» more  VTS 1999»
13 years 11 months ago
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
Debashis Nayak, D. M. H. Walker