Sciweavers

3130 search results - page 56 / 626
» Design Correctness of Digital Systems
Sort
View
ISVLSI
2002
IEEE
89views VLSI» more  ISVLSI 2002»
15 years 8 months ago
Speedup of Self-Timed Digital Systems Using Early Completion
An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their s...
Scott C. Smith
CASES
2009
ACM
15 years 7 months ago
Exploiting residue number system for power-efficient digital signal processing in embedded processors
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...
JCDL
2005
ACM
101views Education» more  JCDL 2005»
15 years 9 months ago
Grid-based digital libraries: cheshire3 and distributed retrieval
The University of California, Berkeley and the University of Liverpool are developing a Information Retrieval and Digital Library system (Cheshire3) that operates in both singlepr...
Ray R. Larson, Robert Sanderson
136
Voted
DL
1997
Springer
206views Digital Library» more  DL 1997»
15 years 7 months ago
The Digital Library Integrated Task Environment (DLITE)
We describe a case study in the design of a user interface to a digital library. Our design stems from a vision of a library as a channel to the vast array of digital information ...
Steve B. Cousins, Andreas Paepcke, Terry Winograd,...
ISCAS
2007
IEEE
95views Hardware» more  ISCAS 2007»
15 years 9 months ago
An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters
—This paper presents an incomplete settling design technique for switched-capacitor pipelined analog-to-digital converters (ADCs) to improve conversion rate. An improved multiply...
Fule Li, Zhihua Wang, Dongmei Li