124 search results - page 11 / 25 » Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digi... |
GECCO
2005
Springer
2005
Springer
Providing information from the environment for growing electronic circuits through polymorphic gates
14 years 1 months ago
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
GECCO
2009
Springer
14 years 5 days ago
2009
Springer
A non-uniform cellular automata-based model is presented for the evolutionary development of digital circuits at the gate level. The main feature of this model is the modified lo...