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» Design Methodology for Analog High Frequency ICs
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ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...
VTC
2008
IEEE
142views Communications» more  VTC 2008»
14 years 1 months ago
EXIT-Chart Aided Hybrid Multiuser Detector Design for Frequency-Domain-Spread Chip-Interleaved MC-CDMA
— With the advent of EXtrinsic Information Transfer (EXIT) charts, we are capable of analyzing, predicting and visually comparing the convergence behaviours of different turbo Mu...
Lei Xu, Rong Zhang, Sheng Chen, Lajos Hanzo
ICCAD
1994
IEEE
200views Hardware» more  ICCAD 1994»
13 years 11 months ago
Techniques for crosstalk avoidance in the physical design of high-performance digital systems
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
Desmond Kirkpatrick, Alberto L. Sangiovanni-Vincen...
ICCD
1996
IEEE
108views Hardware» more  ICCD 1996»
13 years 11 months ago
Module Generators for a Regular Analog Layout
In general, automatic layout composition techniques based on pre-designed devices facilitate the production of small IC numbers by prefabricating their basic structures. They also...
J. Kampe, C. Wisser, G. Scarbata
DAC
2006
ACM
14 years 1 months ago
"The IC nanometer race -- what will it take to win?"
: Creating ICs in the nanometer age is a high-stakes race that few companies can afford to compete in – and even fewer can win. Hear how senior technologists from the world’s t...
G. Singer, Philippe Magarshack, Dennis Buss, F.-C....