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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
14 years 2 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
ERSA
2006
102views Hardware» more  ERSA 2006»
14 years 17 days ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
14 years 4 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
EUC
2004
Springer
14 years 4 months ago
Experimental Assessment of Scenario-Based Multithreading for Real-Time Object-Oriented Models: A Case Study with PBX Systems
This paper presents an experimental evaluation of our scenario-based multithreading for real-time object-oriented models by the use of a case study of a Private Branch eXchange (PB...
Saehwa Kim, Michael Buettner, Mark Hermeling, Seon...
DAC
2005
ACM
14 years 1 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro