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» Design Recovery of a Two Level System
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DSD
2010
IEEE
162views Hardware» more  DSD 2010»
13 years 6 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
FDL
2005
IEEE
14 years 1 months ago
Incorporating SystemC in Analog/Mixed-Signal Design Flow
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
Patrick Birrer, Walter Hartong
BMCBI
2010
103views more  BMCBI 2010»
13 years 7 months ago
MTRAP: Pairwise sequence alignment algorithm by a new measure based on transition probability between two consecutive pairs of r
Background: Sequence alignment is one of the most important techniques to analyze biological systems. It is also true that the alignment is not complete and we have to develop it ...
Toshihide Hara, Keiko Sato, Masanori Ohya
TPDS
2010
174views more  TPDS 2010»
13 years 6 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
ICALT
2005
IEEE
14 years 1 months ago
The Design for a Collaborative System of English as Foreign Language Composition Writing of Senior High School Students in Taiwa
The authors will propose system integrated mechanisms, a Wiki platform for peer-reviewing, Link Grammar for automatically checking the students’ papers, and a RSS reader to peri...
Yi-Fan Chang, Diane L. Schallert