Sciweavers

79 search results - page 10 / 16
» Design Space Exploration for Massively Parallel Processor Ar...
Sort
View
IPPS
2008
IEEE
14 years 2 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng
SAMOS
2005
Springer
14 years 1 months ago
Automatic FIR Filter Generation for FPGAs
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...
Holger Ruckdeschel, Hritam Dutta, Frank Hannig, J&...
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
14 years 3 days ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
CLUSTER
2008
IEEE
14 years 2 months ago
High message rate, NIC-based atomics: Design and performance considerations
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
Keith D. Underwood, Michael Levenhagen, K. Scott H...
SC
2004
ACM
14 years 1 months ago
A Parallel Visualization Pipeline for Terascale Earthquake Simulations
This paper presents a parallel visualization pipeline implemented at the Pittsburgh Supercomputing Center (PSC) for studying the largest earthquake simulation ever performed. The ...
Hongfeng Yu, Kwan-Liu Ma, Joel Welling