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RECONFIG
2009
IEEE
269views VLSI» more  RECONFIG 2009»
15 years 10 months ago
A 10 Gbps OTN Framer Implementation Targeting FPGA Devices
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
Guilherme Guindani, Frederico Ferlini, Jeferson Ol...
FCCM
2009
IEEE
170views VLSI» more  FCCM 2009»
15 years 1 months ago
Generic Software Framework for Adaptive Applications on FPGAs
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...
125
Voted
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
15 years 3 months ago
Protocol Wrappers for Layered Network Packet Processing in Reconfigurable Hardware
abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform ...
Florian Braun, John W. Lockwood, Marcel Waldvogel
FPL
2006
Springer
108views Hardware» more  FPL 2006»
15 years 7 months ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood
131
Voted
MOBIHOC
2009
ACM
16 years 4 months ago
WARPnet: clean slate research on deployed wireless networks
In this demo we present the Wireless Open-Access Research Platform for Networks (WARPnet), a research testbed aimed at performing experiments at the network level. The platform is...
Siddharth Gupta, Chris Hunter, Patrick Murphy, Ash...