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TWC
2010
13 years 3 months ago
Rateless coding for MIMO fading channels: performance limits and code construction
In this letter the performance limits and design principles of rateless codes over fading channels are studied. The diversity-multiplexing tradeoff (DMT) is used to analyze the sys...
Yijia Fan, Lifeng Lai, Elza Erkip, H. Vincent Poor
SBCCI
2003
ACM
115views VLSI» more  SBCCI 2003»
14 years 2 months ago
Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
WCAE
2006
ACM
14 years 3 months ago
PSATSim: an interactive graphical superscalar architecture simulator for power and performance analysis
Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff b...
Clint W. Smullen, Tarek M. Taha
FPL
2000
Springer
116views Hardware» more  FPL 2000»
14 years 19 days ago
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...
C3S2E
2009
ACM
14 years 1 months ago
The promise of solid state disks: increasing efficiency and reducing cost of DBMS processing
Most database systems (DBMSs) today are operating on servers equipped with magnetic disks. In our contribution, we want to motivate the use of two emerging and striking technologi...
Karsten Schmidt 0002, Yi Ou, Theo Härder