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ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
14 years 6 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
FPL
1995
Springer
106views Hardware» more  FPL 1995»
14 years 18 days ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
SIES
2007
IEEE
14 years 3 months ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp
TON
2008
138views more  TON 2008»
13 years 9 months ago
On the performance benefits of multihoming route control
Multihoming is increasingly being employed by large enterprises and data centers to extract good performance and reliability from their ISP connections. Multihomed end networks tod...
Aditya Akella, Bruce M. Maggs, Srinivasan Seshan, ...
KDD
2010
ACM
289views Data Mining» more  KDD 2010»
13 years 7 months ago
Exploitation and exploration in a performance based contextual advertising system
The dynamic marketplace in online advertising calls for ranking systems that are optimized to consistently promote and capitalize better performing ads. The streaming nature of on...
Wei Li 0010, Xuerui Wang, Ruofei Zhang, Ying Cui, ...