870 search results - page 96 / 174 » Design Tradeoffs for SSD Performance |
ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
—Owing to inductive effect, coplanar waveguide (CPW) is widely used to achieve signal integrity in high performance clock designs. In this paper, we first propose a piece-wise l...
118
click to vote
DSD
2003
IEEE
15 years 9 months ago
2003
IEEE
Increasing link speeds have placed enormous burden on the processing requirements and the processors are expected to carry out a variety of tasks. Network Processors (NP) [1] [2] ...
139
click to vote
ISVLSI
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
137
click to vote
ICNP
1998
IEEE
15 years 8 months ago
1998
IEEE
Quality-of-service (QoS) routing satisfiesapplication performance requirements and optimizes network resource usage but effective path-selection schemes require the distribution o...
177
click to vote
ICCD
1992
IEEE
15 years 8 months ago
1992
IEEE
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...