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ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
TPDS
2002
13 years 7 months ago
2002
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
HPCA
2008
IEEE
14 years 1 months ago
2008
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
DCOSS
2007
Springer
14 years 1 months ago
2007
Springer
Many emergent distributed sensing applications need to keep track of mobile entities across multiple sensor networks connected via an IP network. To simplify the realization of suc...
EUROPAR
2001
Springer
13 years 12 months ago
2001
Springer
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...