140 search results - page 14 / 28 » Design and Analysis of Fault Tolerant Architectures by Model... |
MOBIHOC
2008
ACM
14 years 7 months ago
2008
ACM
The routing performance of delay tolerant networks (DTN) is highly correlated with the distribution of inter-contact times (ICT), the time period between two successive contacts o...
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
DATE
2010
IEEE
14 years 23 days ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
FORTE
2004
13 years 9 months ago
2004
Software Model-Checking and Testing are some of the most used techniques to analyze software systems and identify hidden faults. While software model-checking allows for an exhaust...