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SLIP
2009
ACM
14 years 2 months ago
Predicting the worst-case voltage violation in a 3D power network
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shaya...
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Power grid analysis benchmarks
ACT Benchmarks are an immensely useful tool in performing research since they allow for rapid and clear comparison between different approaches to solving CAD problems. Recent expe...
Sani R. Nassif
ICDCS
2010
IEEE
13 years 11 months ago
Extracting More Capacity from Multi-channel Multi-radio Wireless Networks by Exploiting Power
—Transmission power plays a crucial role in the design and performance of wireless networks. The issue is therefore complex since an increase in transmission power implies that a...
Devu Manikantan Shila, Yu Cheng, Tricha Anjali, Pe...
SLIP
2009
ACM
14 years 2 months ago
On the bound of time-domain power supply noise based on frequency-domain target impedance
One of the popular design methodologies for power distribution networks (PDNs) is to identify a target impedance to be met across a broad frequency range. The methodology is based...
Xiang Hu, Wenbo Zhao, Peng Du, Yulei Zhang, Amiral...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 29 days ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu