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IPPS
1999
IEEE
14 years 1 months ago
Reconfigurable Parallel Sorting and Load Balancing: HeteroSort
HeteroSort load balances and sorts within static or dynamic networks. Upon failure of a node or path, HeteroSort uses a genetic algorithm to minimize the distribution path by optim...
Emmett Davis, Bonnie Holte Bennett, Bill Wren, Lin...
HOTI
2005
IEEE
14 years 2 months ago
Design and Implementation of a Content-Aware Switch Using a Network Processor
Cluster based server architectures have been widely used as a solution to overloading in web servers because of their cost effectiveness, scalability and reliability. A content aw...
Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. ...
DAC
2000
ACM
14 years 10 months ago
Hardware-software co-design of embedded reconfigurable architectures
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
Yanbing Li, Tim Callahan, Ervan Darnell, Randolph ...
DAC
2004
ACM
14 years 22 days ago
An SoC design methodology using FPGAs and embedded microprocessors
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
Nobuyuki Ohba, Kohji Takano
IPPS
2008
IEEE
14 years 3 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng