665 search results - page 8 / 133 » Design and Analysis of a Dynamically Reconfigurable Network ... |
WWW
2003
ACM
14 years 8 months ago
2003
ACM
This paper describes a dynamic service reconfiguration model where the proxy is composed of a chain of service objects called mobilets (pronounced as mo-be-lets), which can be dep...
MICRO
2000
IEEE
13 years 11 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
SBCCI
2006
ACM
14 years 1 months ago
2006
ACM
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
Lecture Notes
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...