761 search results - page 77 / 153 » Design and Analysis of a Robust Pipelined Memory System |
LOCA
2005
Springer
14 years 1 months ago
2005
Springer
In this paper, we present a robust, decentralized approach to RF-based location tracking. Our system, called MoteTrack, is based on low-power radio transceivers coupled with a mode...
DFT
2005
IEEE
14 years 1 months ago
2005
IEEE
Sequential elements, flip-flops, latches, and memory cells, are the most vulnerable components to soft errors. Since state-of-the-art designs contain millions of bistables, it i...
INFOCOM
2006
IEEE
14 years 1 months ago
2006
IEEE
— The current Domain Name System (DNS) follows a hierarchical tree structure. Several recent efforts proposed to re-implement DNS as a peer-to-peer network with a flat structure...
DATE
2010
IEEE
14 years 25 days ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
MICRO
2007
IEEE
14 years 2 months ago
2007
IEEE
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...