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ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 4 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
ISPA
2007
Springer
14 years 2 months ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...
IPPS
2007
IEEE
14 years 2 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
BMCBI
2007
177views more  BMCBI 2007»
13 years 8 months ago
Biowep: a workflow enactment portal for bioinformatics applications
Background: The huge amount of biological information, its distribution over the Internet and the heterogeneity of available software tools makes the adoption of new data integrat...
Paolo Romano 0001, Ezio Bartocci, Guglielmo Bertol...
BMCBI
2007
186views more  BMCBI 2007»
13 years 8 months ago
GeneBins: a database for classifying gene expression data, with application to plant genome arrays
Background: To interpret microarray experiments, several ontological analysis tools have been developed. However, current tools are limited to specific organisms. Results: We deve...
Nicolas Goffard, Georg Weiller