455 search results - page 5 / 91 » Design and Evaluation of a High Performance Dynamically Exte... |
165
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PDP
2007
IEEE
15 years 10 months ago
2007
IEEE
—Grid computing is becoming more and more attractive for coordinating large-scale heterogeneous resource sharing and problem solving. Of particular interest for effective Grid co...
132
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RTSS
2006
IEEE
15 years 10 months ago
2006
IEEE
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...
133
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ISCA
2008
IEEE
15 years 10 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
143
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DAC
2000
ACM
15 years 8 months ago
2000
ACM
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
135
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MICRO
2009
IEEE
15 years 11 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...