1084 search results - page 55 / 217 » Design and Evaluation of a Selective Compressed Memory Syste... |
118
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
124
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EUROPAR
2005
Springer
15 years 9 months ago
2005
Springer
Most research in the area of publish/subscribe systems has not considered fault-tolerance as a central design issues. However, faults do obviously occur and masking all faults is a...
144
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LCN
2003
IEEE
15 years 9 months ago
2003
IEEE
- With the current wide deployment of Gigabit Ethernet technology in the backbone and workgroup switches, the network performance bottleneck has shifted for the first time in nearl...
139
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PDPTA
2000
15 years 5 months ago
2000
This paper deals with multiprocessor systems required to provide both high performance and good figures of dependability attributes. Fault tolerance is pursued through a proper co...
127
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HPCA
2007
IEEE
16 years 4 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...